A data busing structure is employed for transmission of data between elements of a system. Typically, both the data and a clock or strobe for delimiting data bits are bussed in the system. In many systems, the data bus is further defined such that the data bus logic state must change at least once in a certain length of time (or number of bits). A failure to change in the specified period is an indication of a failure in the system. These prolonged sequences of one logic state or the other typically occur if the data source fails or becomes inactive or if the data bus driving circuit or bus itself fails.
A need has arisen for a simple and efficient circuit for detecting the above noted prolonged sequences of unchanged logic state. There is further a need for an error detector circuit of this character which indicates an error in the case of internal failures within the detector circuit itself, whereby to afford a self-checking circuit. There is still a further need for a circuit of this character which is actively exercised in the absence of an error so that a fault occurring within such circuitry will become readily apparent at an early stage in order to guard against silent failures.